In this assignment, you are required to design a simple digital system that is
composed of a combinational logic circuit (CLC) and a synchronous sequential logic
circuit (SLC) as shown in Figure 1.
Figure 1. Block diagram of the system.
The SLC is basically a counter built using JK flip-flops that behaves based on an
external input. The count value is displayed on light emitting diodes (LEDs) and is
also the input to the CLC component. The behavior of the counter to be designed
depends on the least significant digits of your university ID; specifically, the ones
and tens digits. Table 1 lists the behavior of the counter to be designed based on
these two numbers. For example, if your ID is 2018xx34, then you should design
counter number III since the ones digit is even and the tens digit is odd. So, you
need to design one counter only based on your ID.